QUAD D TYPE FLIP FLOP WITH CLEAR

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Niveau: Supérieur, Doctorat, Bac+8
M54HC175 M74HC175 October 1992 QUAD D-TYPE FLIP-FLOP WITH CLEAR B1R (Plastic Package) ORDER CODES : M54HC175F1R M74HC175M1R M74HC175B1R M74HC175C1R F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) PIN CONNECTIONS (top view) NC = No Internal Connection DESCRIPTION .HIGH SPEED tPD = 13 ns (TYP.) AT VCC = 5 V .LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C .HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) .OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS .SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.) .BALANCED PROPAGATION DELAYS tPLH = tPHL .WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V .PIN AND FUNCTION COMPATIBLE WITH 54/74LS175 The M54/74HC175 is ahigh speedCMOSQUADD- TYPE FLIP-FLOP WITH CLEAR fabricated in sili- con gate CMOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. These four flip-flops are controlled by a clock input (CLOCK) and a clear input (CLEAR). The informa- tion data applied to the D inputs (1D to4D) are trans- fered to the outputs (1Q to 4Q and 1Q to 4Q) on the positive-going edge of the clock pulse.

  • power dissipation

  • dc input

  • clock

  • ±1 ±1

  • active low

  • output voltage

  • leakage current

  • ic's internal equivalent


Publié le : mardi 19 juin 2012
Lecture(s) : 45
Source : thierry-lequeu.fr
Nombre de pages : 11
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HIGH SPEED tPD= 13 ns (TYP.) AT VCC= 5 V LOW POWER DISSIPATION ICC= 4mA (MAX.) AT TA= 25+C HIGH NOISE IMMUNITY VNIH= VNIL= 28 % VCC(MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL= 4 mA (MIN.) BALANCED PROPAGATION DELAYS tPLH= tPHL WIDE OPERATING VOLTAGE RANGE VCCV(OPR) = 2 V TO 6 . PIN AND FUNCTION COMPATIBLE WITH 54/74LS175
M1R C1R (Micro Package) (Chip Carrier) ORDER CODES : M54HC175F1R M74HC175M1R M74HC175B1R M74HC175C1R
PIN CONNECTIONS(top view)
B1R (Plastic Package)
DESCRIPTION The M54/74HC175 is a high speed CMOS QUAD D-TYPE FLIP-FLOP WITH CLEAR fabricated in sili-con gate CMOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. These four flip-flops are controlled by a clock input (CLOCK) and a clear input (CLEAR). The informa-tion data applied to the D inputs (1D to 4D) are trans-fered to the outputs (1Q to 4Q and 1Q to 4Q) on the positive-going edge of the clock pulse. The reset function is accomplished when the clear input is taken low and all Q outputs are kept low regardless of other input conditions. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
F 1R (Ceramic Package)
M54HC175 M74HC175
QUAD D-TYPE FLIP-FLOP WITH CLEAR
October 1992
NC = No Internal Connection
M54/M74H C175
INPUT AND OUTPUT EQUIVALENT CIRCUIT
TRUTH TABLE
CLEAR L H H H X: Don't Care
LO GIC DI AG RAM
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INPUTS D X L H X
CLOCK X
Q L L H Qn
OUTPUS
Q H H L Qn
FUNCTION
NO CHANGE
PIN DESCRIPTIO N
PIN No 1
2, 7, 10, 15 3, 6, 11, 14
4, 5, 12, 13 9
8 16
SYMBOL CLEAR
1Q to 4 Q 1Q to 4 Q
1D to 4D CLOCK
GND VCC
NAME AND FUNCTION Master Reset Input (Active LOW) Flip Flop Outputs Complementary Flip Flop Outputs Data Inputs Clock Input (LOW to HIGH, Edge-triggered) Ground (0V) Positive Supply Voltage
ABSO LUTE MAXI MUM RATING S
IEC LOGIC SYMBOL
M54/M74H C175
Symbol Parameter Value Unit VCCSupply Voltage V-0.5 to +7 VIDC Input Voltage -0.5 to VCCV+ 0.5 VODC Output Voltage -0.5 to VCCV+ 0.5 IIKDC Input Diode Current#20 mA IOKDC Output Diode Current#20 mA IODC Output Source Sink Current Per Output Pin#25 mA ICCor IGNDDC VCCor Ground Current#50 mA PDmW500 (*) Power Dissipation o TstgStorage Temperature -65 to +150 C o TL300 CLead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. o o o o (*) 500 mW:485 Cderate to 300 mW by 10mW/ C: 65 C to 65 C
RECO MMENDED OPERATING CO NDI TI ONS
Symbol VCC VI VO Top
tr, tf
Parameter Supply Voltage Input Voltage Output Voltage Operating Temperature:M54HCSeries M74HCSeries Input Rise and Fall Time
VCC= 2 V VCC= 4.5 V VCC= 6 V
Value 2 to 6 0 to VCC 0 to VCC -55 to +125 -40 to +85 0 to 1000 0 to 500 0 to 400
Unit V V V o C o C ns
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M54/M74H C175
DC SPECIFICATIO NS
Symbol
VIH
VIL
VOH
VOL
II
ICC
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Parameter
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
Input Leakage Current Quiescent Supply Current
Test Conditions
VCC (V)
2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0 2.0 4.5 6.0 4.5 6.0
6.0
6.0
VI= VIH or VIL
IO=-20mA
IO=-4.0 mA IO=-5.2 mA
VI= IO= 20mA VIH or VIL IO= 4.0 mA IO= 5.2 mA VI= VCCor GND
VI= VCCor GND
o TA= 25 C 54HC and 74HC Min. Typ. Max. 1.5 3.15 4.2 0.5 1.35 1.8 1.9 2.0 4.4 4.5 5.9 6.0 4.18 4.31 5.68 5.8 0.0 0.1 0.0 0.1 0.0 0.1 0.17 0.26 0.18 0.26 #0.1
4
Value o -40 to 85 C 74HC Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8
1.9 4.4 5.9 4.13 5.63
0.1 0.1 0.1 0.33 0.33 #1
40
o -55 to 125 C 54HC Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8
1.9 4.4 5.9 4.10 5.60
0.1 0.1 0.1 0.40 0.40 #1
80
Unit
V
V
V
V
mA
mA
AC ELECTRICAL CHARACTERI STI CS(CL= 50 pF, I nput tr= tf= 6 ns)
M54/M74H C175
Test Conditions Value o o o TA= 25 C -40 to 125 Cto 85 C -55 Symbol Parameter Unit VCC 54HC and 74HC 74HC 54HC (V) Min. Typ. Max. Min. Max. Min. Max. tTLHOutput Transition 2.0 30 75 95 110 tTHLTime ns 4.5 8 15 19 22 6.0 7 13 16 19 tPLHPropagation 2.0 60 150 190 225 tPHLnsDelay Time 4.5 19 30 38 45 (CLOCK - Q, Q) 6.0 16 26 32 38 tPLHPropagation 2.0 50 125 155 190 tPHLDelay Time ns 4.5 16 25 31 38 (CLEAR - Q, Q) 6.0 14 21 26 32 fMAXMaximum Clock 2.0 6.2 13 5 4.2 Frequency MHz 4.5 31 52 25 21 6.0 37 61 30 25 tW(H)11075 95 2.0 28 Minimum Pulse tW(L)Width ns 4.5 7 15 19 22 (CLOCK) 6.0 6 13 16 19 tW(L)110Minimum Pulse 75 95 2.0 28 Width ns 4.5 7 15 19 22 (CLEAR) 6.0 6 13 16 19 ts1102.0 28 75 95 Minimum Set-up Time ns 4.5 7 15 19 22 6.0 6 13 16 19 th2.0 0 Minimum Hold 0 0 Time ns 4.5 0 0 0 6.0 0 0 0 tREM5 5 5Minimum 2.0 Removal Time ns 4.5 5 5 5 (CLEAR) 6.0 5 5 5 CINpF5 10 10 10 Input Capacitance CPD(*) Power Dissipation 47 pF Capacitance (*) CPDis defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPDwVCCwfIN+ ICC/4 (per Flip Flop)
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M54/M74H C175
SWITCHING CHARACTERISTICS TEST WAVEFORM
TEST CIRCUIT ICC(Opr.)
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D
E
b
b1
B
DIM.
1.27
Z
F
L
e
e3
Plastic DIP16 (0.25) MECHANICAL DATA
0.51
0.77
MAX.
mm
1.65
0.100
0.280
0.050
M54/M74H C175
0.065
MAX.
0.201
a1
0.787
0.020
0.130
0.700
I
17.78
5.1
7.1
0.010
3.3
0.335
20
2.54
0.5
0.25
8.5
TYP.
TYP.
inch
MIN.
0.020
MIN.
7/11
P001C
0.030
0.046
inch
TYP.
7
20
3.3
0.090
0.020
2.79
1.27
0.51
1.17
2.29
0.22
0.4
0.050
L
0.38
0.110
0.787
0.276
8.05
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5.08
7.8
P
Q
0.022
0.317
0.406
0.060
0.012
MAX.
G
F
0.31
0.015
0.016
0.009
e3
0.307
0.200
P053D
N
H
M
MAX.
mm
TYP.
A
B
D
E
MIN.
DIM.
Ceramic DIP16/1 MECHANICAL DATA
17.78
M54/M74H C175
MIN.
10.3
0.55
1.52
0.130
0.700
DIM.
A a1 a2 b b1 C c1 D E e e3 F G L M S
MIN.
0.1
0.35 0.19
9.8 5.8
3.8 4.6 0.5
SO16 (Narrow) MECHANICAL DATA
mm TYP.
0.5
1.27 8.89
MAX. 1.75 0.2 1.65 0.46 0.25
10 6.2
4.0 5.3 1.27 0.62
MIN.
0.004
0.013 0.007
45+(typ.) 0.385 0.228
8+(max.)
0.149 0.181 0.019
inch TYP.
M54/M74H C175
0.019
0.050 0.350
MAX. 0.068 0.007 0.064 0.018 0.010
0.393 0.244
0.157 0.208 0.050 0.024
P013H
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MIN.
d2
M1
A
B
D
d1
PLCC20 MECHANICAL DATA
MIN.
G
4.2
1.27
9.78
8.38
0.100
10.03
2.54
4.57
8.89
e
E
e3
inch
M
0.050
0.015
0.200
0.050
F
0.180
0.356
0.330
0.395
0.004
TYP.
MAX.
MAX.
mm
0.101
M54/M74H C175
0.022
0.045
TYP.
5.08
7.37
0.38
DIM.
1.27
P027A
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1.14
0.56
9.04
0.165
0.385
0.350
0.290
M54/M74H C175
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsability for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectonics.
{1994 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A
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