IEEE Integrated Reliability Workshop

Brian Langley

Description

IEEE/Integrated Reliability Workshop P.O. Box 308 Westmoreland, NY 13490-0308 FIRST CLASS MAIL FIRST-CLASS MAIL U.S. POSTAGE PAID SYRACUSE, NY Permit No. 999 October 12-15, 1998 General Chair Raif S. Hijab Cirrus Logic [phone]...fax...[phone] Technical Program Chair Eric S. Snyder Sandia Technologies [phone]... fax...0022 Technical Program Vice Chair William R. Tonti IBM Microelectronics [phone]...fax...6567 Finance/Registration Douglas Menke, Chair Motorola Brian Langley, Vice Chair Hewlett-Packard Arrangements David W. Kirchner, Chair LSI Logic Nels A. Dumin, Vice Chair Texas Instruments nduminati.com Publications Ehren Achee, Chair Reedholm Instruments Laszlo Gutai, Vice Chair Level One Communications Communications Chair Sally J. Yankee IBM Communications Vice Chair-Asia Boon-Khiem Liew TSMC bkliew%td@tsmc.

• stanford sierra


• dining room


• industry has


• existing design


• oxides


• increased performance


• camp


• south lake


• reliability

Sujets

• Conley
• Chaîne
• Hewlett-Packard
• Siemens
• Rogers
• Martin
• Motorola
• Hunter

Informations

• Publié par: pefav
• Nombre de lectures: 73
• Langue: English
• Poids de l'ouvrage: 1 Mo

Extrait

IEEE/Integrated Reliability Workshop
1998 International FIRST CLASS MAILP.O. Box 308
U.S. POSTAGEWestmoreland, NY 13490-0308
PAID
SYRACUSE, NY
Permit No. 999
INTEGRATED
RELIABILITY
WORKSHOp
Stanford Sierra Camp, S. Lake Tahoe, CA
FIRST CLASS MAILOctober 12-15, 1998 http://www.irps.org/irw/
General Chair
Raif S. Hijab
Cirrus Logic PROGRAM ANNOUNCEMENT!
[phone]...fax...[phone]
[e-mail]
Technical Program Chair
WORKSHOP E XPERIENCEEric S. Snyder 98 Workshop Features:Sandia Technologies
You are cordially invited to participate in the 1998 Integrated(505) 872-0011...fax...0022
[e-mail] Reliability Workshop. The Workshop provides a unique forum for
Technical Program Vice Chair ‹ Keynotesharing new approaches to achieve and maintain microelectronic
William R. Tonti Semiconductor Equipment Industry:reliability. Here you will closely interact with your peers atIBM Microelectronics
Migration from Equipment to Entiremoderated discussion groups, open poster sessions, presentations(802) 769-6561...fax...6567
[e-mail] Process Module Solutionsand special interest groups. All Workshop activities take place in
Finance/Registration a relaxed and rustic setting that promotes an atmosphere of Dennis Yost, Applied Materials
Douglas Menke, Chair interactive learning and knowledge sharing. ‹ Group DiscussionsMotorola
[e-mail] Interconnect Reliability with focus
MAJOR T ECHNICAL T HEMESBrian Langley, Vice Chair on Copper
Hewlett-Packard
Increased performance and reduced cost these have driven Oxides ultra thin [e-mail]
ESD requirements, testing, &rapid growth and unprecedented technical innovation in the semi-Arrangements
protection developmentconductor industry. To meet these demands, new materials andDavid W. Kirchner, Chair
LSI Logic processes must be introduced for deep-submicron integrated C-V measurements its implication
[e-mail] circuit technology. These new materials necessitate new and on reliability
Nels A. Dumin, Vice Chair revised physical models for reliability. Reflecting this need, dis- ‹ TutorialsTexas Instruments
cussion groups will focus on Cu metal and low-k dielectrics, ultra-nduminati.com ? The Analysis of Oxide
thin oxides, ESD and new C-V techniques for reliability. ThePublications Reliability Data
technical program includes a designing-in reliability session withEhren Achee, Chair ? Reliability Issues & the Develpment ofReedholm Instruments papers on thermal modeling, Cu reliability, via reliability and stress
Advanced DRAM [e-mail] voiding. A contributors to failure session provides papers on
Laszlo Gutai, Vice Chair ‹ 16+ Technical Presentations on:
physical models for ultra-thin dielectric reliability. A reliabilityLevel One Communications
Designing In [e-mail] test structures session has papers on ESD and several novel
Wafer Level Reliabilitytechniques to assess plasma damage. A WLR session providesCommunications Chair
Contributors to FailureSally J. Yankee papers on oxide breakdown in a 64MB DRAM, and a new CV
IBM Reliability Test Structurescharacterization technique. There are also tutorials on analysis [e-mail]
oxide data and DRAM design for reliablility. ‹ Open Poster Sessions
Communications Vice Chair-Asia
Boon-Khiem Liew ‹ Special Interest Groups
TSMC KEYNOTE: S EMICONDUCTOR E QUIPMENT INDUSTRY:[e-mail]
MIGRATION FROM EQUIPMENT TO ENTIRE PROCESS MODULE SOLUTIONS? Dennis Yost, Applied Materials, Santa Clara, CACommunications Vice Chair-Europe
Andreas Martin In the 1960 s and early 70s the semiconductor industry was characterized as a vertically integrated industry with each
Siemens company building their own tools, developing their own technology, building their own chips for use in their own systems
[e-mail]
that were eventually sold. As the industry has matured and continues to mature, the vertical integration of the industry has
Audio-Visual
for the most part dissolved and continues to evolve into disintegrated, highly specialized segments. IC designers are focusingKimball M. Watson, Chair
on putting multiple macro-modules (DRAM, SRAM, MPU, Analog, etc..) together to produce the entire system on a chip.IBM
[e-mail] The foundries are focusing on getting and manufacturing the capability to produce all the technologies for the design houses.
Ken Bowers, Vice Chair This is putting increased pressure on the semiconductor equipment suppliers to not only supply guaranteed individual
Micro Instrument Co.
equipment performance, but more recently guaranteed performance of sub-modules (Shallow Trench Isolation, [e-mail]
Cu interconnect, etc.) that are used to build the macro-modules. For the interconnect, as an example, the defect density,ExOfficio Members & IRPS Rep.
James W. Miller electrical CD control, via resistance and required reliability performance are being evaluated and characterized in response
Motorola to the demands. In fact guaranteed performance levels are not far off from being required by the customer as part of the module
Harry A. Schafft purchase. This eventual requirement has forced equipment suppliers to develop and enhance many of the capabilities related
NIST
to electrical performance and reliability testing that typically only resided with their customers.
over insertion of new dielectric materials will be required in the near future. WithTUTORIALS
interconnect lengths of kilometers per circuit, minimum line widths
In our continuing effort to enhance the value of the workshop experience
shrinking below 100nm, the number of metallization levels moving toward
there will be a tutorial on Monday afternoon and one on Tuesday afternoon.
10, and the use of an interconnect metal which must be fully isolated from
the dielectric, enormous reliability challenges must be met during a periodMonday Tutorial in Angora Room:
of rapid development of new materials and processes. The goals of thisTHE ANALYSIS OF O XIDE RELIABILITY DATA? William Hunter of Texas
discussion group will be to identify areas of greatest concern, and share
Instruments, Dallas, TX
lessons learned, and anticipated needs.
Techniques for measuring gate oxide reliability, such as TDDB, voltage Specific discussion topics will include:
ramps, and current ramps have existed for a long time, but many of these
? Can the same reliability approaches that were used for Al be applied to
are applied qualitatively. We discuss here detailed aspects of analysis
Cu?
methods which can be applied to these techniques to make absolute
? Is electromigration-induced failure still an issue for Cu-based alloys?reliability determinations. Along the way, we discuss important aspects
What are the new design rules?; Are new design strategies enabled?, Aresuch as failure rate based methodologies, band-bending corrections to
existing design strategies still OK?measured gate voltages, active gate oxide area scaling, and quasi-static
? How do liners for Cu affect electromigration?lifetime transformations.
? Are there reliability issues with the liners themselves? How easy is it to insure
Tuesday Tutorial in Angora Room: that liners are continuous everywhere on a kilometer of interconnect?, Are there
RELIABILITY ISSUES & THE D EVELOPMENT OF ADVANCED DRAM wear-out failure mechanisms for liners, such as cracking due to thermal
cycling?, How can liner reliability be assessed?PRODUCTS? Wayne Ellis of IBM, Essex Junction, VT
? Are there new processing-related defects arising from Cu-based technologies
Because of the all points addressable array of minimum feature size
which lead to reliability issues?, How important is Cu adhesion?, How
structures, DRAMs have been a powerful vehicle to develop techniques
significant are the differences in Cu deposition techniques?and insights into the relationships between technology and the achievement
? What are the implications of dual damascene vias?: Will liner integrity inof manufacturability and final product reliability. This tutorial will discuss
vias be a problem?, Will aspect ratio uniformity be maintained ?, Willhow today s reliability issues are addressed in the realm of high perfor-
stress become an issue?mance DRAM product design and development. Because of increased
? How will the mechanical and thermal properties of Low-K dielectricsdemands for product performance in a wider market, the issue of functional
reliability in the system electrical environment will be introduced. Discus- affect reliability?
sion of functional reliability will cover how this issue can relate to and also ? Are there other properties of Cu or Low-K, different from Al and SiO ,
2
be independent of traditional reliability issues. The tutorial will cover: which could bring in unanticipated reliability challenges?
? Basic DRAM architecture and function.
2. OXIDES - ULTRA THIN OXIDES
? Design for reliability, testability and manufacturability techniques
Moderators: Rolf-Peter Vollertsen (Siemens) & Dave Dumin (Clemson Univ.)
in DRAMs.
A lot of open questions still exist in the area of oxide reliability. New
? Burn in. aspects come into play when the oxide thickness is scaled down to only
? Functional reliability a few nm. What should we mainly be measuring, electric or thermal
(catastrophic dielectric) breakdowns; non-destructiv