M54 74HC4020 M54 74HC4040
13 pages
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M54 74HC4020 M54 74HC4040


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13 pages


M54/74HC4020 M54/74HC4040 March 1993 HC4040 12 STAGE BINARY COUNTER HC4020 14 STAGE BINARY COUNTER B1R (Plastic Package) ORDER CODES : M54HCXXXF1R M74HCXXXM1R M74HCXXXB1R M74HCXXXC1R F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) PIN CONNECTION (top view) .HIGH SPEED fMAX = 73 MHz (TYP.) at VCC = 5 V .LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 oC .HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) .OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS .SYMMETRICAL OUTPUT IMPEDANCE |IOH| = IOL = 4 mA (MIN.) .BALANCED PROPAGATION DELAYS tPLH = tPHL .WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V to 6 V .PIN AND FUNCTION COMPATIBLE WITH 4020B/4040B DESCRIPTION The M54/74HC4020/HC4040 are high speed CMOS 14/12-STAGE BINARY COUNTER fabricated in silicon gate C2MOS technology. They have the same high speed performance of LSTTL combined with true CMOS low consumption. A clear input is used to reset the counter to the all low level state.Ahigh level on CLEAR accomplishes the reset function. A negative transition on the CLOCK input increments the counter by one. For HC4020 twelve kind od divided output are provided; 1st and 4th stage to 14th stage.

  • current ±

  • clock clock

  • stage binary

  • dc output

  • dc input

  • operating temperature

  • pin description

  • diode current



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Nombre de lectures 42


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