The beauty with Asterisk is you start with the software and you add the hardware around it. Given these
49 pages
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The beauty with Asterisk is you start with the software and you add the hardware around it. Given these

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49 pages
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Scalable TDM Media GatewaysWith FreeSwitch & OpenZAPPresented by: Nenad Corbic, B.Eng Chief Software EngineerSoftware Manager Sangoma Technologies4-Aug-09 / 1Introduction• Voice API Building Blocks• TDM Architectural Limitations & Bottlenecks • Asterisk/Zaptel FreeSwitch/OpenZap Architecture Zaptel (Channelized) Model vs TDM API (Span) model• Unified TDM Voice API – libsangoma• Abstracted Signaling Stacks – API - libsigboost• Sangoma & FreeSwitch• FreeSwitch OpenZap Architecture• Features and Benefits of OpenZap• OpenZap API• and Woomera• Whats new at Sangoma: Software & Hardware4-Aug-09 / 2TDM Architectural Limitations & Bottlenecks• Monolithic/Single Server vs Distributed Architecture. • TDM Bottleneck (Zaptel/TDM Hardware) • Interrupt Frequency / Real Time• Interrupt Latency / Real Time • Kernel / User Space Context Penalty• TDM Clustering Solutions limited and hard to configure.• Software Codec (g729)• Software Echo Cancellation & DTMF & D-Chan HDLC• Goal super scalable gateway ~ 1000 Voip to PSNT calls.4-Aug-09 / 3sipFreeSwitch/Asterisk ZAPTEL TDM ModelCORE dtmf/dspOpen_zap/chan_zap_20 ms voice chunks/dev/zap/ 0 1 2 3 4 5 6 7 8 9 10 … 245 246… 500... 600Kernell SpaceSpaceZAPTEL Analog FSKConferenceZaptel IOTones Soft HDLCVoice Processing Soft Echo Cancellation1ms voice chunks1ms 1ms1ms 1ms 1ms 1mshw_isr() 1000 isr / sec * spans8byt 8byt8byt 8byt 8byt 8bytTDM Drivers/Hardware (Sangoma/Others..)T1/E1/BRI ...

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Scalable TDM Media Gateways With FreeSwitch & OpenZAP
Presented by: Nenad Corbic, B.Eng Chief Software Engineer Software Manager Sangoma Technologies
4-Aug-09 / 1
Introduction
Voice API Building Blocks
TDM Architectural Limitations & Bottlenecks Asterisk/Zaptel FreeSwitch/OpenZap Architecture Zaptel (Channelized) Model vs TDM API (Span) model
Unified TDM Voice API – libsangoma Abstracted Signaling Stacks – API - libsigboost Sangoma & FreeSwitch
FreeSwitch OpenZap Architecture Features and Benefits of OpenZap OpenZap API OpenZap and Woomera
Whats new at Sangoma: Software & Hardware
4-Aug-09 / 2
TDM Architectural Limitations & Bottlenecks
Monolithic/Single Server vs Distributed Architecture. TDM Bottleneck (Zaptel/TDM Hardware) Interrupt Frequency / Real Time Interrupt Latency / Real Time Kernel / User Space Context Penalty TDM Clustering Solutions limited and hard to configure. Software Codec (g729) Software Echo Cancellation & DTMF & D-Chan HDLC
Goal super scalable gateway ~ 1000 Voip to PSNT calls.
4-Aug-09 / 3
ZAPTEL TDM Model
FreeSwitch/Asteri
CORE dtmf/dsp
Open_zap/chan_zap
s
20 ms voice chunks /dev/zap/ 0 1 2 3 4 5 6 7 8 9 10 … 245 246… 500...600
Analog FSK
ZAPTEL
ConferenceZaptel IO Tones Voice Processing
Soft HDLC Soft Echo Cancellation
 k
Kernel Space
1ms voice chunks 1ms 1ms 1ms hw_isr()1000isr / sec * spans18bmysmbsy8tbt18s88bbyytytt1mtyb8 TDM Drivers/Hardware(Sangoma/Others..)
T1/E1/BRI/Analog
4-Aug-09 / 4
Channelized Architecture
Device per channel T1 = 24 channels = 24 devices
Interrupt per Card Interrupt depends on chunk size Chunk/Interrupts 1ms == 1000 intr/sec 2ms == 500 intr/sec 5ms == 200 intr/sec 10ms == 100 intr/sec
4-Aug-09 / 5
Interrupt Frequency
Generating interrupt every 8 bytes – 1000 interrupts per sec. Ok for single card. However adding multiple cards Exponential Drop Off in performance Solution is to use higher chunks.
4-Aug-09 / 6
Interrupt Latency
can to delay a hardware interrupt by 15 to 20msSystem Need for large hardware buffering to avoid overrun.
1 channel: 20ms = 160 bytes A108 - 8 Port E1 card = 248 channels Buffering for Rx = 248ch * 160 bytes ~= 40KB Buffering for Tx = 248ch * 160 bytes ~= 40KB Total = 80KB of memory in hardware
Cost vs Functionality
4-Aug-09 / 7
HW Optimizations: EC & DTMF & DCHAN HDLC
IP
FreeSwitch/Asterisk sip
openzap/chan_zap
/dev/zap/ 0 1 2 3 4 5 6 7 8 9 10 … 245 246… 500...600
ZAPTEL Soft EC DCHAN HDLC hw_isr()100isr /FSK, Tones,oCcoensference, sec singVoice Pr
T1/E1/BRI/Analog
10ms 10ms 10ms10ms 10ms 10ms 10ms 10ms 80byt 80byt 80byt 80byt 80byt 80byt 80byt 80byt
Hardware Echo Cancellation & DTMF & DCHAN HDLC TDM Drivers/Hardware(Sangoma/Others… )
Kernel Space
4-Aug-09 / 8
Channelized: Chunk Size Performance
System: 16 E1 - 496 Channels - Quad Core / 4Gig Memory
Chunk Sizes:
8 bytes -- 1ms interrupt == 1000 interrupts/sec 16 bytes -- 2ms interrupt == 500 interrupts/sec 40 bytes -- 5ms interrupt == 200 interrupts/sec 80 bytes -- 10ms interrupt == 100 interrupts/sec
Results:
Chunk Inter/sec Sy Load: Idle Sy Load: 496 channels 8 1000 15% 26% 16 500 6% 16% 40 200 2% 9% 80 100 1% 7%
procs -----------memory---------- ---swap-- -----io---- --system-- -----cpu------r b swpd free buff cache si so bi bo in cs us sy id wa st 15 0 0 705904 591500 1377936 0 0 0 172 12854554613780 0 0
4-Aug-09 / 9
TDM API Model
MS
20 ms adjustable voice chunks
G
dtmf/dsp
CORE
LibsangomaAPI
/dev/wptdm/ 0 1 2 3 4 5 6 7 8 9 10 … 245 246… 500...600
TDM API
TDM IO
10ms voice chunks 10ms hw_isr()100isr / sec * spans1800bmysyb08sm01tyb08sm0t1by80ms10yt0bs808t10mtbyt TDM Drivers/Hardware(Sangoma/Others… ) HWEC|DTMF|TONES|CODEC
T1/E1/BRI/Analog
HDLC Dchan
Kernel Space
4-Aug-09 / 10
Kernel Context Penalty
Greater the number of kernel devices, the greater the context penalty. System doesn t scale over 500 individual channels. Where each channel receives its own kernel device. Solution is to move to aper spankernel device. This way all channels inside a span are read in a same kernel context. Stage two solution is to memory map user space into kernel space and have zero copy transfers from kernel to user space.
4-Aug-09 / 11
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