ARM Cortex-M1 Embedded Processor Hardware Development ...

Description

®ARM Cortex™-M1 Embedded
Processor Hardware Development
Tutorial
for Fusion Mixed-Signal FPGAs© 2009 Actel Corporation. All rights reserved.
Printed in the United States of America
Part Number: 50200154-2
Release: November 2009
No part of this document may be copied or reproduced in any form or by any means without prior written
consent of Actel.
Actel makes no warranties with respect to this documentation and disclaims any implied warranties of
merchantability or fitness for a particular purpose. Information in this document is subject to change without
notice. Actel assumes no responsibility for any errors that may appear in this document.
This document contains confidential proprietary information that is not to be disclosed to any unauthorized
person without prior written consent of Actel Corporation.
Trademarks
Actel, IGLOO, Actel Fusion, ProASIC, Libero, Pigeon Point and the associated logos are trademarks or registered
trademarks of Actel Corporation. All other trademarks and service marks are the property of their respective
owners.ARM Cortex-M1 Embedded Processor Hardware Development Tutorial
Table of Contents
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Requirements for this Tutorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1 Design Overview . . . . . . . . . ...

Sujets

• Cortex associatif
• Processor Direct Slot
• Component Object Model
• SRAM (entreprise)
• United States Basketball League
• Maple

Informations

• Publié par: Anji
• Nombre de lectures: 242
• Langue: English
• Poids de l'ouvrage: 2 Mo

Extrait

ARM ® Cortex™-M1 Embedded Processor Hardware Development Tutorial

for Fusion Mixed-Signal FPGAs

© 2009 Actel Corporation. All rights reserved. Printed in the United States of America Part Number: 50200154-2 Release: November 2009 No part of this document may be copied or reproduc ed in any form or by any means without prior written consent of Actel. Actel makes no warranties with respect to this docu mentation and disclaims any implied warranties of merchantability or fitness for a particu lar purpose. Information in this document is su bject to change without notice. Actel assumes no respon sibility for any errors that may appear in this document. This document contains confidential proprietary information that is not to be disclosed to any unauthorized person without prior written consent of Actel Corporation.

Trademarks Actel, IGLOO, Actel Fusion, ProASIC, Libero, Pigeon Poin t and the associated logos ar e trademarks or registered trademarks of Actel Corporation. Al l other trademarks and service marks ar e the property of their respective owners.

Table of Contents

ARM Cortex-M1 Embedded Processor Hardware Development Tutorial

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Requirements for this Tutorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1 Design Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Cortex-M1 System Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Cortex-M1 Hardware Design Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 Before You Get Started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Download Tutorial Files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Install USB-to-UART Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 3 Tutorial – Create Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Step 1 – Create an Actel Libero IDE Project . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Step 2 – Create a SmartDesign Component with in Actel Libero IDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Step 3 – Create Flash Memory System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 4 Tutorial – Simulation, Synthesis, and Place-and-Route . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Step 4 – Perform Pre-Synthesis Functional Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Step 5 – Perform Synthesis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Step 6 – Perform Place-and-Route . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 5 Tutorial – Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Step 7 – Generate Programming Fi le with Software Code in NVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Step 8 – Connect to the Target . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Step 9 – Program the M1AFS1500 FPGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 6 List of Document Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 A Product Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Customer Service . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Actel Customer Technical Support Center . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Actel Technical Support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Website . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Contacting the Customer Technical Support Center . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

3

Introduction

This document shows you how to create a Cortex™- M1 processor system that runs on one of the Actel Fusion embedded development kit boar d s. This design can be us as a starting point for ed developing your Cortex-M1 embedded syste m targeting Actel’s Fusion FPGA devices. Because this tutorial targ ets one of Actel’s Fusion devices, you need to beco me familiar with Fusion features and architecture. The Fusion datasheet and user’s guide are on the Actel website: http://www.actel.com/documents/Fusion_DS.pdf http://www.actel.com/documents/Fusion_UG.pdf After completing this tutorial, you will know the hardware desi gn flow for creating a Cortex-M1 embedded system using Libero ® Integrated Design Environment (IDE) and SmartDesign tools. This includes the following design steps:  Instantiating and configuring the Cortex-M 1 processor, memory, and peripherals in SmartDesign  Connecting peripherals and defining the address map in SmartDesign  Automated generation of the DirectCore RTL  Functional simulation using a bus functional model (BFM)  Synthesis, place-and-route of hardware design, and generating FPGA programming image  Programming an Actel FP GA with Cortex-M1 system ready for software design For this tutorial, we will use the binary file fro m previously developed so ftware. The binaries will be written into the memory on the target develo pment kit, along with the programming bit files for the hardware designed in this tutorial. If you want to lear n about the software development flow for the Cortex-M1 proc essor, you can study theARM Cortex-M1 Embedded Processor Software Development Tutorial: http://www.actel.com/documents/Co rtexM1_Proc_SW_Tutorial_UG.pdf. Requirements for this Tutorial Hardware To complete this tutorial, you need one of the following boards with the corresponding hardware:  Fusion Embedded Development Ki t Board (M1AFS-EMBEDDED-KIT board) – Low-cost programming stick – 2 USB cables (USB to mini-USB) – PC with 2 USB ports  Fusion Advanced Development Kit Board (M1AFS-ADV-DEV-KIT board) – Low-cost programming stick – 2 USB cables (USB to mini-USB) – 9 V power supply (provided with kit) – PC with 2 USB ports Everything you need (exc ept the PC) is provided with the development kit. For more information about the development boards, re fer to Design Hardware page: www.actel.com/products/hardware/default.aspx

 

5

Introduction

6

Software The instructions are based on the Actel Libero IDE v8.6 SPA softwa re along with the corresponding Synplify ® and ModelSim ® software installed on your PC. If you are using a different version,OEM some steps and screen sh ots may be different. Intellectual Property (IP) This tutorial is based on the Di rectCore IP listed below. If you do not have these DirectCore IP versions in your SmartDesign Catalog, you may ob serve different behavior from what is described in this tutorial.  Cortex-M1 version 2.7.103  CoreAHBLite version 2.0.140  CoreAPB version 1.1.101  CoreAHB2APB version 1.1.101  CoreAhbNvm version 1.3.135  CoreAhbSram version 1.3.103  CoreMemCtrl version 2.0.105  CoreUARTapb version 4.0.120  CoreGPIO version 1.2.103  CoreAI version 3.0.119 Licensing You will need a license for these IP cores. If you do not have a lice nse, go to the Customer Portal at https://www.actel.com/portal/, sign in and chooseLicenses & Registration the left navigation. on Click theRequest Free Licensebutton and choose theLibero Goldlicense. Follow the instructions in the email sent to you to set up the license on your machine.

 

1 – Design Overview

Cortex-M1 System Description The design contains a Cortex-M1 processor system running on an Ac tel Fusion FPGA, which contains an analog block for monitoring analog signals. The syste m measures various voltages, currents, and temperatures on the target board, processes th e sampled data, and sends the result over UART. There is a potentiometer on the bo ard to change the analog voltage being sampled. In this tutorial you will communicate with the target using Hyper Terminal.

Cortex-M1 Hardware Design Description The Cortex-M1 processor system uses CoreAI, which a llows the processor to configure, control, and interact with the Analog Block inside the Actel Fusion FPGA. The UART in the system connects to an off-chip USB-to-UART chip, which allows you to communicate with the ta rget system via a COM port on your machine (using HyperTerminal). Also in cluded are 4 output bits to LEDs, and 2 input bits from push-buttons or DIP switch es (depending on the target board). The Fusion Advanced Development Kit and the Fu sion Embedded Development Kit boards contain an Actel Fusion AFS1500 device that has 1 MByte of embedded flash memory (also referred to as nonvolatile memory, or NVM) and 30 KBytes of internal SRAM. The Fusion Embedded Development Kit board has 1 Mbyte of SRAM, comprised of tw o 4 Mbit × 16 bit chips. The Fusion Advanced Development Kit board has 2 Mbytes of SRAM, co mprised of two 1 Mbit x 16 bit chips. This hardware design connects to all of these memori es, not necessarily using the entire memory space of each device. Actel’s Fusion devices have an on-chip 100 MHz RC oscillator. You will feed this clock source to a PLL inside the Fusion device that modifies the clock frequency. The output of the PLL is the system clock. This design enables the JTAG debu g interface of the Cortex-M1 pr ocessor for software debugging. The debug interface will not be used in this hardware de sign tutorial. However, it is required for the Fusion Mixed-Signal Tutorial fo rARM Cortex-M1 Embedded Processor Software De velopment FPGAs (www.actel.com/documents/Co rtexM1_Proc_SW_Tutorial_UG.pdf), which uses hardware created in this design tutorial.

 

7

Design Overview A block diagram of the design is shown inFigure 1-1.

Debug Interface

Analog Sources on Target Board

USB-to-UART Chip

On-Chip Flash (NVM)

Analog Block

UART

RC Oscillator

Figure 1-1 Block Diagram

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Cortex-M1

On-Chip SRAM

PLL

AHB-Lite Bus

Off-Chip SRAM AHB-APB Bridge

APB Bus

 

GPIO

System Clock Actel Fusion FPGA Hard IP Peripherals Soft IP Peripherals

SRAM Chip

LEDs and Switches

2 – Before You Get Started

Download Tutorial Files Before starting the tutorial, you need to download the tutorial fi les from the website for the board you are targeting. Go to Actel's Design Hardware web page and clic k the link for the board you are targeting (http://www.actel.com/produ cts/hardware/default.aspx). On the web page of the target board, click on the zip file under theARM Cortex-M1 Embedded Processor Hardware Development Tutorialdocument. plac er called Cortex _ _ _ The files are ed in a fold M1 Fusion HW Tutorial. If you browse the contents of the zip file, you wi ll see a subdirectory for every board this tutorial supports. The directory structure is simi lar for each board. As an example,Figure 2-1 shows a picture of the directory structure for the Fu sion Embedded Development Kit board (M1AFS- EMBEDDED-KIT).

Figure 2-1 Tutorial Files TheVerilog andVHDL contain the complete VHDL and Verilog projects for this subdirectories tutorial design, for your reference. TheTutorial_Files contains the source files you subdirectory need to complete this tutorial.Table 2-1 gives files. a description of these The names of the files will be slightly different depending on the board you are targeting. Table 2-1 Description of Tutorial Files File Name Description M1AFS_EMB_TUT Pin constraints for the Fu sion Embedded Development Kit board TUTORIAL.HEX Intel-Hex file which contains Cortex-M1 software code M1AFS EMB TUT <VERILOG/VHDL>.PDC Constraint to put JTAG reset and clock net on global _ _ _ TheUSB_Drivers USB-to-UART chip on the target board. e contains the driver for th subdirectory This driver allows you to communicate with the target board over USB by treating the USB port as a COM port. Therefore, you can use HyperTerminal to connect to a UART in the design running on the board.

 

9

Before You Get Started

Install USB-to-UART Driver At the end of the tutori al, you program the Fusion FPGA and communicate with the target board. To complete the tutorial, you need to make sure that the USB-to-UART drivers are installed on your machine and identify which COM port the USB port is associated with. Follow the steps below before starting the tutorial to make sure your ma chine is properly configur ed and connected to the target board. Setting Up the USB-to-UART Driver 1. Make sure that a terminal emul ation program such as HyperTer minal, which is included with Windows, ® is installed on your PC. 2. Install the drivers for the USB to RS -232 Bridge by double-clicking on thePreInstaller.exe executable located in theUSB_Driverssubfolder. Accept the default installation folder and press theInstallbutton. Press theContinue Anywaybutton if prompted. 3. Connect USB and power cables according toTable 2-2. Table 2-2 Power and USB Connections Board Power and USB Connections M1AFS-EMBEDDED-KIT Make sure you have J40 se t to use USB power (not V5IN). Connect a USB cable to J2, which provides power and the USB-to-UART communication. Make sure JP10 is set to use the 1.5 V external regulator (connect pins 2 and 3). M1AFS-ADV-DEV-KIT Connect the 9 V power supp ly provided with the kit to J3 on the board. Connect a USB cable to J2, this provides the USB-to-UART communication and make sure SW7 is in the ON position to supply power to the board.

1 0

If Windows prompts you to connect to Windows Update, selectNo, not at this timeand pressNext. 4. SelectInstall the software automatically(recommended) and pressNext. Once installation has completed, pressFinish. Repeat the driver installation steps a second time (if prompted). Press theContinue Anywaybutton if prompted. 5. Open the Windows Device Manager by selectingStart>Control Panel>System>Hardware >Device Manager. Expand the Ports (COM and LPT) section and take note of the COM port assignment for the SFE US B to RS232 Controller (inFigure 2-2it is assigned to COM8).

 

Install USB-to-UART Driver

If you do not see SFE USB to RS232 Controller in the Device Manager (Figure 2-2), you may need to reboot your machine.

Figure 2-2 Windows Device Manager 1. Connect the FlashPro3 progra mming interface according toTable 2-3. Table 2-3 Programming Interface Connections Board FlashPro3 Programmin g Interface Connection M1AFS-EMBEDDED-KIT Connect the FlashPro3 Low-Cost Pr ogramming Stick (LCPS) to J1. M1AFS-ADV-DEV-KIT Connect a USB cable between the LCPS and the host machine. 2. If you are prompted to install drivers for the FlashPro3 hard ware, refer to theFlashPro User's Guide at:ptth m/col.teacw.ww//u_ordp.gfcudontmefls/hpas.

 

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