Design Patterns of Parallel Control Systems [Elektronische Ressource] = Entwurfsmuster paralleler Steuerungssysteme / Philippe Stellwag. Betreuer: Wolfgang Schröder-Preikschat
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Design Patterns of Parallel Control Systems [Elektronische Ressource] = Entwurfsmuster paralleler Steuerungssysteme / Philippe Stellwag. Betreuer: Wolfgang Schröder-Preikschat

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Design Patterns ofParallel Control Systems—Entwurfsmusterparalleler SteuerungssystemeDer Technischen Fakultätder Universität Erlangen-Nürnbergzur Erlangung des GradesD O K T O R - I N G E N I E U Rvorgelegt vonPhilippe Antoine StellwagErlangen – Januar 2011Als Dissertation genehmigt vonder Technischen Fakultät derUniversität Erlangen-NürnbergTag der Einreichung: 21.01.2011Tag der Promotion: 05.08.2011Dekan: Prof. Dr.-Ing. habil. Reinhard GermanBerichterstatter: Prof. habil. Wolfgang Schröder-PreikschatProf. Dr.-Ing. Jörg NolteProf. Wolfgang PapiernikAbstractDecreasing feature sizes and the desire to continue with large-scale integrationof semiconductor components let processor manufacturers adjoin to physicalrestrictions of single processor architectures. Hence, they started for a while toreducetheclockfrequenciesoftheirCPUsandputmorethanoneexecutioncoreon silicon die. These multi-core processors have, for some time, become moreinteresting to the embedded and real-time software sector. This is due to theprice for (ultra-)low voltage multi-core processors is on the decrease while theclock frequencies for uni-processors tends to stagnate. Continuing innovation inthe sector of data and computationally intensive industrial real-time systems,however, are driven by, and need, raw processing power.To accommodate the requirements of processing power intensive systems, de-velopers have to parallelize their software.

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Publié par
Publié le 01 janvier 2011
Nombre de lectures 19
Langue English
Poids de l'ouvrage 3 Mo

Extrait

Design Patterns of
Parallel Control Systems

Entwurfsmuster
paralleler Steuerungssysteme
Der Technischen Fakultät
der Universität Erlangen-Nürnberg
zur Erlangung des Grades
D O K T O R - I N G E N I E U R
vorgelegt von
Philippe Antoine Stellwag
Erlangen – Januar 2011Als Dissertation genehmigt von
der Technischen Fakultät der
Universität Erlangen-Nürnberg
Tag der Einreichung: 21.01.2011
Tag der Promotion: 05.08.2011
Dekan: Prof. Dr.-Ing. habil. Reinhard German
Berichterstatter: Prof. habil. Wolfgang Schröder-Preikschat
Prof. Dr.-Ing. Jörg Nolte
Prof. Wolfgang PapiernikAbstract
Decreasing feature sizes and the desire to continue with large-scale integration
of semiconductor components let processor manufacturers adjoin to physical
restrictions of single processor architectures. Hence, they started for a while to
reducetheclockfrequenciesoftheirCPUsandputmorethanoneexecutioncore
on silicon die. These multi-core processors have, for some time, become more
interesting to the embedded and real-time software sector. This is due to the
price for (ultra-)low voltage multi-core processors is on the decrease while the
clock frequencies for uni-processors tends to stagnate. Continuing innovation in
the sector of data and computationally intensive industrial real-time systems,
however, are driven by, and need, raw processing power.
To accommodate the requirements of processing power intensive systems, de-
velopers have to parallelize their software. This requires concurrency control
mechanisms that satisfy the semantic shift from pseudo to real parallelism.
These mechanisms, however, induce a whole host of side effects, in particu-
lar concerning logical correctness, time awareness, and timing quality (e.g., low
jitter), to such real-time systems. Additionally, state of the art approaches
to tackle concurrency within shared-memory control systems jeopardize their
labor efficiency, and resource contention might easily offset the computing ben-
efits of multiple execution cores. To overcome these side effects, researchers have
started to investigate coordination and synchronization mechanisms that avoid
the drawbacks of traditional blocking mechanisms and resolve concurrent situa-
tions by appropriate nonblocking algorithms. Existing nonblocking algorithms,
however, are highly use-case specific, rather complex, and thus, exhibit a lack
of changeability and expandability. This is a serious problem within a chang-
ing operational environment, which is typical within innovation-driven software
development.
This thesis considers an industrial control system similar to a robotic control,
and investigates shared-memory communication within such data and compu-
tationally intensive systems. The results of this dissertation have two core con-
tributions. First, it presents novel design patterns that allow every moderate-
skilled developer to build nonblocking communication mechanisms that widely
avoid the drawbacks of their blocking counterparts. And second, it investi-
gates the impacts of a changing operational environment to nonblocking shared
objects, and presents very promising results to by-pass their typical use-case
specific embedding and complexity, for which they are usually blamed for.
iiiivParts of this dissertation have been published in the following peer-reviewed
papers:
Poster Abstracts
[1] Stellwag, P.; Scheler, F.; Krainz, J.; Schröder-Preikschat, W.: A Wait-
FreeNCASLibraryforParallelApplicationswithTimingCon-
straints, in Proc. of the 16th ACM SIGPLAN Annual Symp. on Prin-
ciples and Practice of Parallel Programming (PPoPP 2011), February
12–16, 2011, San Antonio, TX. Sheridan Printing Co., Inc.
Workshop Papers
[2] Stellwag, P.; Schröder-Preikschat, W.: Challenges in Real-Time
Synchronization, McCool, M.; Rosenblum, M. (Hrsg.): in Proc. of
the 3rd USENIX Workshop on Hot Topics in Parallelism (HotPar 2011),
May 26–27, 2011, Berkeley, CA, USA.
[3] Stellwag, P.; Lohmann, D.; Schröder-Preikschat, W.: An Asyn-
chronous Nonblocking Coordination and Synchronization Pro-
tocol for a Parallel Robotic Control Kernel, Engel, M., Nolte, J.
(Hrsg.): in Proc. of the 2nd Workshop on Isolation and Integration in
Embedded Systems (IIES 2009), March 31, 2009, Nuremberg, Germany.
New York, NY, USA: ACM, 2009 (European Conference on Computer
Systems (EuroSys 2009)). ISBN 978-1-60558-464-5, pages 7–12.
Conference Papers
[4] Stellwag, P.; Krainz, J.; Schröder-Preikschat, W.: A Wait-Free Dy-
namic Storage Allocator by Adopting the Helping Queue Pat-
tern, in Proc. of the 9th IASTED International Conference on Paral-
lel and Distributed Computing and Networks (PDCN 2010), February
16–18, 2010, Innsbruck, Austria. ACTA Press, 2010 (28th IASTED
International Multi-Conference on Applied Informatics). ISBN 978-0-
88986-820-5, pages 79–87.
[5] Stellwag, P.; Ditter, A.; Schröder-Preikschat, W.: A Wait-Free
Queue for Multiple Enqueuers and Multiple Dequeuers Using
Local Preferences and Pragmatic Extensions, in Proc. of the 4th
IEEE International Symposium on Industrial Embedded Systems (SIES
2009), July 8–10, 2009, Lausanne, Switzerland. Los Alamitos, CA,
USA: IEEE Computer Society Press, 2009. ISBN 978-1-4244-4110-5,
pages 237–248.
vviiviiiAcknowledgments
This dissertation is based on research that I have carried out as research as-
sistant in the Department of Computer Science 4 for Distributed Systems and
Operating Systems at the Friedrich-Alexander University Erlangen-Nuremberg
in Germany. The research activities have been made within the scope of an
industrial project in close collaboration with Siemens. It would not have been
written without the support, help, and cooperation of many people that have
supported me in various ways. It is not possible to mention all these people
here, but I would like to express my gratitude to some in particular.
First of all, I want to thank my thesis supervisor and first referee, Wolfgang
Schröder-Preikschat, the head of the I4 department, for the chance to carry
out interesting research in the fields of nonblocking coordination and synchro-
nizationforreal-timepurposesaswellashissupport, advice, andencouragement
on me.
Many thanks go to my third referee as well as industrial advisor, Wolfgang
Papiernik, who provided the industrial project and supported me in discussing
ideas, gave me an understanding of the industrial field of control systems, and
brought me together with the respective developers and contact persons within
the Siemens environment.
I want to thankGuidoSeeger who continually supported me in doing research
at Siemens in organizational and technical concerns, in particular, to meet the
right people, to attend on meetings that relate to my topic, and in helping me
to reap an in-depth understanding in architectural aspects of industrial control
systems.
I want to express my appreciation for Jürgen Kleinöder and Michael
Käver, who provided the contractual basis for my work at the I4 department
as well as by Siemens.
Many thanks go to my I4 colleagues, in particular, Daniel Lohmann and
FabianScheler, who helped me multiple times by writing and reviewing some
of my papers and in discussing the "crazy parts" of my work. I want further-
more thankGuido-Arndt Söldner, who invited me to join Wosch’s group in
Erlangen after we met us by Netlogix in Nuremberg during my study period.
Many thanks go to all my colleagues at Siemens, who supported my work, in
ixx
which they, for instance, spent time to answer my questions, to review my work,
and/or to support me in any other way.
Thanksgotostudents,inparticulartoAlexanderDitterandJakobKrainz,
who wrote study and/or diploma theses under my supervision, in which they
implemented and evaluated some of my ideas.
And last but not least, I want to express my appreciation for my parents, grand-
parents, and, inparticular, formygirlfriend,Rose-MarieHartmann, fortheir
continuous advice, care, support, and patience.
Erlangen, Januar 2011

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