ISE 6 In-Depth Tutorial

ISE 7 In-Depth Tutorial R"© 2005 Xilinx, Inc. All Rights Reserved. XILINX, the Xilinx logo, and other designated brands included herein are trademarks of Xilinx, Inc. All other trademarks are the property of their respective owners. NOTICE OF DISCLAIMER: Xilinx is providing this design, code, or information "as is." By providing the design, code, or information as one possible implementation of this feature, application, or standard, Xilinx makes no representation that this implementation is free from any claims of infringement. You are responsible for obtaining any rights you may require for your implementation. Xilinx expressly disclaims any warranty whatsoever with respect to the adequacy of the implementation, including but not limited to any warranties or representations that this implementation is free from claims of infringement and any implied warranties of merchantability or fitness for a particular purpose. ISE 7 In-Depth Tutorial www.xilinx.com 1-800-255-7778R Preface About This Tutorial About the In-Depth Tutorial ®This tutorial gives a description of the features and additions to Xilinx ISE™ 7. The primary focus of this tutorial is to show the relationship among the design entry tools, Xilinx and third-party tools, and the design implementation tools. This guide is a learning tool for designers who are unfamiliar with the features of the ISE software or those wanting to refresh their skills and knowledge. You may choose to follow one of three tutorial flows available in this document. For information about the tutorial flows, see “Tutorial Flows.” Additional Resources For additional information, go to http://www.xilinx.com/support/support.htm. The following table lists some of the resources you can access from this page. You can also directly access some of these resources using the provided URLs. Resource Description/URL Tutorial Tutorials covering Xilinx design flows, from design entry to verification and debugging http://www.xilinx.com/support/techsup/tutorials/index.htm Answers Current listing of solution records for the Xilinx software tools Database Search this database using the search function at http://www.xilinx.com/xlnx/xil_ans_browser.jsp Application Descriptions of device-specific design techniques and approaches Notes http://www.xilinx.com/xlnx/xweb/xil_publications_index.jsp?categ ory=Application+Notes Forums Discussion groups and chat rooms for Xilinx software users http://toolbox.xilinx.com/cgi-bin/forum Data Sheets Data Sheet, which describe device-specific information on Xilinx device characteristics, including readback, boundary scan, configuration, length count, and debugging http://www.xilinx.com/xlnx/xweb/xil_publications_index.jsp ISE 7 In-Depth Tutorial www.xilinx.com 3 1-800-255-7778R Preface: About This Tutorial Resource Description/URL Xcell Journals Quarterly journals for Xilinx programmable logic users http://www.xilinx.com/xcell/xcell.htm Tech Tips Latest news, design tips, and patch information on the Xilinx design environment http://www.xilinx.com/xlnx/xil_tt_home.jsp Tutorial Contents This guide covers the following topics. • Chapter 1, “Overview of ISE and Synthesis Tools,” introduces you to the ISE primary user interface, Project Navigator, and the synthesis tools available for your design. • Chapter 2, “HDL-Based Design,” guides you through a typical HDL-based design procedure using a design of a runner’s stopwatch. • Chapter 3, “Schematic-Based Design,” explains many different facets of a schematic- based ISE design flow using a design of a runner’s stopwatch. This chapter also shows how to use ISE accessories such as StateCAD, Project Navigator, CORE Generator™, and ISE Text Editor. • Chapter 4, “Behavioral Simulation,” explains how to use the ModelSim Simulator to simulate a design before design implementation to verify that the logic that you have created is correct. • Chapter 5, “Design Implementation,” describes how to Translate, Map, Place, Route (Fit for CPLDs), and generate a BIT file for designs. • Chapter 6, “Timing Simulation,” explains how to perform a timing simulation using the block and routing delay information from the routed design to give an accurate assessment of the behavior of the circuit under worst-case conditions. • Chapter 7, “iMPACT Tutorial” explains how to program a device with a newly created design using the iMPACT configuration tool. Tutorial Flows This document contains four tutorial flows. In this section, the four tutorial flows are outlined and briefly described, in order to help you determine which sequence of chapters applies to your needs. The tutorial flows include: • HDL Design Flow • Schematic Design Flow • Implementation-only Flow • Device Configuration-only Flow 4 www.xilinx.com ISE 7 In-Depth Tutorial 1-800-255-7778R Tutorial Flows HDL Design Flow The HDL Design flow is as follows: • Chapter 2, “HDL-Based Design” • Chapter 4, “Behavioral Simulation” Note that behavioral simulation is optional; however, it is strongly recommended in this tutorial flow. • Chapter 5, “Design Implementation” • Chapter 6, “Timing Simulation” Note that timing simulation is optional; however, it is strongly recommended. • Chapter 7, “iMPACT Tutorial” Schematic Design Flow The Schematic Design flow is as follows: • Chapter 3, “Schematic-Based Design” • Chapter 4, “Behavioral Simulation” Note that behavioral simulation is optional; however, it is strongly recommended in this tutorial flow. • Chapter 5, “Design Implementation” • Chapter 6,“Timing Simulation” Note that timing simulation is optional; however, it is strongly recommended. • Chapter 7, “iMPACT Tutorial” Implementation-only Flow The Implementation-only flow is as follows: • Chapter 5, “Design Implementation” • Chapter 7, “iMPACT Tutorial” Device Configuration-only Flow For this flow, go to Chapter 7, “iMPACT Tutorial.” ISE 7 In-Depth Tutorial www.xilinx.com 5 1-800-255-7778R Preface: About This Tutorial 6 www.xilinx.com ISE 7 In-Depth Tutorial 1-800-255-7778Table of Contents Preface: About This Tutorial About the In-Depth Tutorial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Additional Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Tutorial Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Tutorial Flows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 HDL Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Schematic Design Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Implementation-only Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Device Configuration-only Flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Chapter 1: Overview of ISE and Synthesis Tools Overview of ISE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Project Navigator Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Sources in Project Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Module View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Snapshot View . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Library View. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Processes for Source Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Process View. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Transcript Window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Error Navigation to Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Error Navigation to Solution Record . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Workspace . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Design Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Text Editor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 ISE Simulator / Waveform Editor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Schematic Editor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Using Snapshots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Creating a Snapshot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Restoring a Snapshot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Viewing a Snapshot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Using Project Archives . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Creating an Archive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .