Programmable Active Memories

Description

Niveau: Supérieur, Doctorat, Bac+8
Programmable Active Memories: a Performance Assessment Patrice Bertin, Didier Roncin and Jean Vuillemin Digital Equipment Corporation Paris Research Laboratory 85, avenue Victor-Hugo 92563 Rueil Malmaison Cedex, France Abstract We present some quantitative performance measurements for the comput- ing power of Programmable Active Memories (PAM), as introduced by [2]. Based on Field Programmable Gate Array (FPGA) technology, the PAM is a universal hardware co-processor closely coupled to a standard host com- puter. The PAM can speed up many critical software applications running on the host, by executing part of the computations through a specic hard- ware design. The performance measurements presented are based on two PAM architectures and ten specic applications, drawn from arithmetics, algebra, geometry, physics, biology, audio and video. Each of these PAM designs proves as fast as any reported hardware or super-computer for the corresponding application. In cases where we could bring some genuine al- gorithmic innovation into the design process, the PAM has proved an order of magnitude faster than any previously existing system (see [19] and [18]). 1 PAM concept Like any RAM memory module, a PAM is attached to the system bus of a host computer. The processor can write into, and read from the PAM.

• design into


• ram


• hardware design


• hardware


• clock speed


• software


• up many critical

Sujets

• Xilinx
• Vuillemin
• Roncin
• Bertin
• CPU design
• Hardware
• Clock rate
• Software

Informations

• Publié par: profil-zyak-2012
• Nombre de lectures: 16
• Langue: English

Extrait

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