TELEFUNKEN Semiconductors Rev A1 May
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Description

U2352B TELEFUNKEN Semiconductors Rev. A1, 29-May-96 1 (8) PWM Power Control for DC Loads Description The U2352B bipolar circuit is a PWM device for control- ling logic level Power MOSFETs and IGBTs. It allows simple power control for dc loads. Integrated load current monitoring with adjustable switch-off threshold also gives the option of measuring the load current via the MOS transistor's on-state resistance, RDS(on), or via a shunt resistor. Special Features Pulse width control up to 50 kHz clock frequency Load current monitoring via the on-state resistance, RDS(on), of the FET or via shunt resistor (optional) 100 mA push-pull output stage Voltage monitoring Temperature-compensated supply voltage limitation Chip temperature monitoring Applications Battery-operated screwdrivers Battery-operated machine tools Halogen lamp controllers Dimmers Electronic fuses High-performance clock generators Package: DIP8, SO8 Chip temperature monitoring 140°C Reference voltage Voltage limitation 6.8 V Oscillator Output stage logic Time window current measurement – + K1 Q S R – + K2 Load current monitoring S2 POR Push-pull output stage 7 8 6 5 2 x I GND S1 1 I 2 3 4 95 9670 VS Q VS Figure 1.

  • load current

  • supply voltage between

  • output stage

  • ±io ±io

  • push-pull output

  • mv load

  • pt io

  • pin


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Nombre de lectures 14
Langue English

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U2352B
PWM Power Control for DC Loads
Description
The U2352B bipolar circuit is a PWM device for control- gives the option of measuring the load current via the
ling logic level Power MOSFETs and IGBTs. It allows MOS transistor’s on-state resistance, R , or via aDS(on)
simple power control for dc loads. Integrated load current shunt resistor.
monitoring with adjustable switch-off threshold also
Special Features Applications
Battery-operated screwdriversPulse width control up to 50 kHz clock frequency
Battery-operated machine toolsLoad current monitoring via the on-state resistance,
R , of the FET or via shunt resistor (optional)DS(on) Halogen lamp controllers
100 mA push-pull output stage Dimmers
Voltage monitoring Electronic fuses
Temperature-compensated supply voltage limitation High-performance clock generators
Chip temperature monitoring
Package: DIP8, SO8
VS
2 x I
Reference
Chip voltage
temperatureS1 Oscillator
monitoring
8140°C Voltage
1
limitation 6.8 V VS
I
– Output stage 7K12 logic+
Push-pull
Time window output stageQ Q
6current measurement S R
GND
3

K2
+
Load current POR
monitoring
5
4
S2
95 9670
Figure 1. Block diagram
TELEFUNKEN Semiconductors 1 (8)
Rev. A1, 29-May-96
U2352B
Figure 2. Block diagram with typical circuit
2 (8) TELEFUNKEN Semiconductors
Rev. A1, 29-May-96
V
B
R
1
V
S
R R
2 5 2 x I
Reference
M Load
D
Chip voltage 1
temperature
S
Oscillator
1
monitoring
C
Osc 8
°
140 C Voltage
1
limitation 6.8 V
V
S
D
2
I
D
3
V

Control
Output stage
T
2 7 1
R K1
6
logic
+
R R
8 G
R Push-pull
7
Time window Q
Q
output stage
C
2
current measurement 6
S R
C
1
I GND
3
R
Set
3

K2
+
Load current
POR
monitoring
*) R
D
5
4
S
2
R R
C
4 9
3
95 9671
* Load current can also optionally be measured via shunt resistorU2352B
Pin Description
Pin Symbol Function
1 8Osc VS 1 Osc Oscillator
2 V Control voltage inputContr
V 2 7 Output 3 I Setpoint value current Contr Set
monitoring
4 S OUT Output, current switch S2 2
I 3 6 GNDSet 5 S IN Input, current switch S2 2
6 GND Ground
S OUT S IN4 5 7 Output Output2 2
8 V Supply voltageS95 9701
Supply, Pin 8 Pulse Width Control, Pins 1 and 2
Internal voltage limitation in the U2352B allows a simple At the frequency-determining capacitor, C , at Pin 1,osc
supply via a series resistor R . This enables operation of1 switching over of two internal current sources gives rise
the circuit under different operating voltages. Supply to a triangular voltage which comparator, K , compares1
voltage between Pin 8 (V ) and Pin 6 (GND) builds up viaS with the control voltage at Pin 2. If the voltage, V , is1
R and is smoothed by C .1 1 more negative than the control voltage V , the output2
stage is switched on via the output stage logic. When CoscThe series resistor R is calculated as follows:1
is charged, the whole process then runs in reverse order
V VBmin Smax (see figure 3).R1max Itot
Load Current Monitoring, Pins 3, 4, 5where
Load current can be measured with the aid of an externalV = Minimum operating voltageBmin
shunt resistor, but this is only appropriate for decreasedV = Maximum supply voltageSmax
loads due to additional power loss and component size
and costs. This involves the shunt voltage being fedI = I + Itot Smax X
directly to Pin 4 via a protective resistor (see figure 5).I = Maximum current consumption of the ISSmax
I = Current consumption of the external elementsX
In order to save component costs and additional power
Various thresholds are derived from an internal reference loss, the integrated load current monitoring allows the
voltage source. load current to be directly measured via the voltage drop
at the on-state resistance, R , of the FET, without anDS(on)Voltage Monitoring additional shunt resistor. The drain voltage of the FET is
supplied via an external protective resistor to Pin 5.During build-up and reduction of the operating voltage,
During the off-state of the FET, a diode clamp circuituncontrolled output pulses with excessively low ampli-
protects the detection input, Pin 5. In the on state, the loadtude are suppressed by the internal monitoring circuit. All
current flowing through the FET generates alatches are reset and the output of the load current detec-
corresponding voltage drop at its R , which is in turnDS(on)tion Pin 4 is switched to ground.
converted into a current at Pin 5 by the protective resistor.
This current reaches the integration element at Pin 4 viaChip Temperature Monitoring
the switch S , which is only closed in the on-state of the2
U2352B has integrated chip temperature monitoring FET. If the voltage at Pin 4 exceeds the setpoint value set
which switches off the output stage when a temperature at Pin 3, as a result of a high load current, the shutdown
of approximately 140°C is reached. The device is not latch is set and the output stage is blocked. To enable the
enabled again until cooling has taken place and the supply circuit again, it is necessary to switch the operating
voltage has been switched off and then back on again. voltage off and then back on again.
Switch-off behavior is adjusted with the resistors at Pin 4
and Pin 5 and also with the capacitor at Pin 4.
TELEFUNKEN Semiconductors 3 (8)
Rev. A1, 29-May-96
U2352B
A time space, t, must be observed between switching the time window, the control voltage V is reduced internally2
output stage off and on and switching S (current about V = approximately 300 mV and the resulting2 2
measurement enable switch) in order to avoid incorrect voltage, V *, is compared with the triangular voltage, V2 1 and incorrect switching-off. To create this (see figure 3).
95 9672V
0.6 VS
V1
V2 V2 V *2
0.3 VS
V7
S2
closed
open
t t
t
Figure 3. Signal characteristics of pulse width control with time window generation
Absolute Maximum Ratings
Reference point Pin 6, unless otherwise specified
Parameters Symbol Value Unit
Power supply
current Pin 8 I 40 mAS
t < 10 s Pin 8 i 400S
Push-pull output stage
Output current Pin 7 ±I 20 mAO
t < 2 ms Pin 7 ±i 100O
Input currents Pins 4 and 5 ±I 10 mAI
Pins 1 and 3 I 2I
Input voltages Pins 1, 2 and 3 V 0 to V VI 8
Storage temperature range T –40 to +125 °Cstg
Junction temperature T +125 °Cj
Ambient temperature T –10 to +100 °Camb
Thermal Resistance
Parameters Symbol Maximum Unit
Junction ambient
DIP8 110
SO8 on PC board R 220 K/WthJA
SO8 on ceramic 140
4 (8) TELEFUNKEN Semiconductors
Rev. A1, 29-May-96
U2352B
Electrical Characteristics
V = 6 V, T = 25 C, reference point Pin 6, unless otherwise specifiedS amb
Parameters Test Conditions / Pins Symbol Min. Typ. Max. Unit
Supply voltage limitation I = 5 mA Pin 8 V 6.4 6.8 7.2 VS S
I = 20 mA 6.5 6.9 7.3S
Current consumption V = 6 V Pin 8 I 2.7 3.5 mAS S
Voltage monitoring
Switch-on threshold Pin 8 V 5.2 5.6 6.0 VSON
Switch-off threshold Pin 8 V 4.7 5.1 5.5SOFF
Oscillator
55f [kHz] Pin 1OSC C [nF] V [V]OSC S
Upper threshold (0.6 V ) V 3.4 3.6 3.8 VS Tu
Lower threshold (0.3 V ) V 1.7 1.8 1.9 VTlS
Charge current –I 26 33 40 Ach
Dischar I 26 33 40 Adis
Control voltage input
Input voltage range Pin 2 V 0 V VI 8
Input current, 0 V ≤ V ≤ V Pin 2 ±I 500 nA2 8 i
Offset voltage K Pin 2–1 ±V 15 mV1 Offs
Window, current Pin 2–1 – V 260 300 340 mV2
measurement
Load current monitoring
Setpoint value input:
Input voltage range Pin 3 V 0 6 VI
Input current 0 V ≤ V ≤ 6 V Pin 3 ±I 500 nA3 i
Offset voltage K Pin 4–3 ±V 15 mV2 Offs
Load current detection:
Voltage limitation I = 1 mA Pin 5 V 2.3 V5 L
V I = –1 mA Pin 5 –V 0.75 L
Discharge current at POR Pin 4 I 1 mAdis
Switch S Pin 5–42
Residual voltage at closed
switch
V = 0 V, I = 50 A V 175 mV4 5 Sat
V = 0.1 V, IA 1504 5
V = 0.3 V, I = 50 A 1254 5
V, I = 100 A 2004 5
Push-pull output stage Pin 7
Upper saturation voltage I = –2 mA Pin 7–8 –V 1 V7 Satu
Lower saturation voltage I = 10 mA Pin 7 V 0.3 V7 Satl
Output current
ON state t ≤ 2 s –i 100 mAo
OFF state t ≤ 2 s i 100o
TELEFUNKEN Semiconductors 5 (8)
Rev. A1, 29-May-96
U2352B
1000
R =1M9VIN
500K
R = 20 kD
800
100K
50K
5 600
20K
400
S 10K2
4 200
5K
95 9673
0
10000 200 400 600 800R VOUT9
95 9686 V ( mV )IN
Figure 4. Typical circuitry of the current switch S with associated transfer characteristics (S closed)2 2
VB
R1
LoadMDR R 12 5
82 k 33 k
D , T and R are1 1 sh
load dependent
C Dosc 2
1 8
D3680 pF
Speed
R6C T1 68 k 1
47 k4.7 F 2 7

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