Hot Chips IA64 Tutorial, part 3

Description

•Part III: Compiler Backend Technologyon IA-64Jesse FangMicroprocessor Research Lab® ercedeHot Chips tutorial 1999MMM•Overviewl PredicationØ If-conversion4l Software pipeliningØ Modulo scheduling and rotating register allocation4l Global schedulingØ Instruction scheduling cross basic block boundaries4multiway l Global register allocationØ Allocate registers for predicate code4 associativityl Driven by information provided by machine model® ercedeHot Chips tutorial 1999MMMUses register stack, ALAT branches increments, Uses control and data speculation, predication, post-Uses rotating registers, stage predicates, loop branchesUses regular, unconditional and parallel compares•(1) Predicationllll TechniquesØ If-conversionØ Parallel compare to reduce control height® ercedeHot Chips tutorial 1999MMMincreasing the critical path lengthPredication has the potential cost ofPredication creates more ILPis better to predicateWhen branch misprediction rate is high, it• ••If-conversion for PredicationIdentifying region of basic blocks based on resourcerequirement and profitability (branch miss rate, miss cost,and parallelism) Result: a single predicated basic blocka < bcmp lt (p1) s = s + a(p2) s = s + b*p = s*p = s® ercedeHot Chips tutorial 1999MMMs = s + b s = s + ap1,p2=a,b .if’s •• •Reducing Control HeightConvert nested into a single predicate Result: shorter control path by reducing the number ofbranchesa ...

Informations

• Publié par: Phawyor
• Nombre de lectures: 15
• Langue: English

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