Design of fully integrated 60 GHz OFDM transmitter in SiGe BiCMOS technology [Elektronische Ressource] / vorgelegt von Srđan Glišić
181 pages
English

Design of fully integrated 60 GHz OFDM transmitter in SiGe BiCMOS technology [Elektronische Ressource] / vorgelegt von Srđan Glišić

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181 pages
English
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Design of Fully Integrated 60 GHz OFDM Transmitter in SiGe BiCMOS Technology Von der Fakultät für Mathematik, Naturwissenschaften und Informatik der Brandenburgischen Technischen Universität Cottbus zur Erlangung des akademischen Grades Doktor der Ingenieurwissenschaften (Dr.-Ing.) genehmigte Dissertation vorgelegt von Diplom-Ingenieur Srñan Glišić geboren am 03.04.1976 in Sarajevo, Bosnien und Herzegowina Gutachter: Prof. Dr.-Ing. Rolf Kraemer Gutachter: Prof. Dr.-Ing. Hermann Schumacher Gutachter: Prof. Dr.-Ing. Dr.-Ing. habil. Robert Weigel Tag der mündlichen Prüfung: 16. Dezember 2010. Acknowledgements Acknowledgements While working in the IHP’s Circuit Design department I had support from many colleagues. At this place I want to thank those who helped me with the thesis. First of all, I want to thank to my supervisor Prof. Rolf Kraemer who offered me the opportunity to work at IHP and supported my work ever since. I especially want to thank Dr. J. Christoph Scheytt who supported my work and was always available for many useful discussions. I wish to thank all my colleagues from the project and department for their help, useful discussions, support and friendship. I thank Dr. Wolfgang Winkler, Dr. Frank Herzel, Dr. Eckhard Graß, Mohamed Elkhouly, Dr. Prabir Datta, Dr. Yaoming Sun, Dr. Miloš Krstić, Miroslav Marinković, Johannes Borngräber, Maxim Piz, Dr.

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Publié par
Publié le 01 janvier 2010
Nombre de lectures 34
Langue English
Poids de l'ouvrage 11 Mo

Extrait





Design of Fully Integrated 60 GHz OFDM
Transmitter in SiGe BiCMOS Technology


Von der Fakultät für Mathematik, Naturwissenschaften und Informatik
der Brandenburgischen Technischen Universität Cottbus

zur Erlangung des akademischen Grades

Doktor der Ingenieurwissenschaften

(Dr.-Ing.)

genehmigte Dissertation

vorgelegt von

Diplom-Ingenieur

Srñan Glišić

geboren am 03.04.1976 in Sarajevo, Bosnien und Herzegowina



Gutachter: Prof. Dr.-Ing. Rolf Kraemer

Gutachter: Prof. Dr.-Ing. Hermann Schumacher

Gutachter: Prof. Dr.-Ing. Dr.-Ing. habil. Robert Weigel

Tag der mündlichen Prüfung: 16. Dezember 2010.






Acknowledgements



Acknowledgements






While working in the IHP’s Circuit Design department I had support from many
colleagues. At this place I want to thank those who helped me with the thesis.
First of all, I want to thank to my supervisor Prof. Rolf Kraemer who offered me the
opportunity to work at IHP and supported my work ever since.
I especially want to thank Dr. J. Christoph Scheytt who supported my work and was always
available for many useful discussions.
I wish to thank all my colleagues from the project and department for their help, useful
discussions, support and friendship. I thank Dr. Wolfgang Winkler, Dr. Frank Herzel, Dr.
Eckhard Graß, Mohamed Elkhouly, Dr. Prabir Datta, Dr. Yaoming Sun, Dr. Miloš Krstić,
Miroslav Marinković, Johannes Borngräber, Maxim Piz, Dr. Chang-Soon Choi, Dr. Klaus
Schmalz, Dr. Gerhard Fischer, Falk Korndörfer, Markus Ehrig, Markus Petri and Frank
Popiela.
Želim na ovom mjestu da se zahvalim za svu ljubav i podršku koju sam imao od moje
majke i brata, a naročito za njihovu podršku za vrijeme mojih studija.
Finally, my love and gratitude go to my wife Izabela for her great help, support and love.
Writing this thesis was possible thanks to her constant support. My thanks go to my son
Adam, who brings me joy every day.

iii Glišić, Design of Fully Integrated 60 GHz OFDM Transmitter in SiGe BiCMOS Technology



iv Contents


Contents

Abstract ix
Zusammenfassung xi
Chapter 1. Intorduction 1
1.1. Wireless Communication at 60 GHz...............................................................................1
1.2. IHP’s SiGe:C BiCMOS Technology...............................................................................4
1.3. Thesis Objective and Organization .................................................................................5
Chapter 2. Transmitter Achitecture 7
2.1. Introduction .....................................................................................................................7
2.2. Application Scenarios and TX Requirements .................................................................7
2.2.1. Link Budget Calculation ..........................................................................................8
2.3. TX Topology ...................................................................................................................9
2.3.1. Version I TX Topology..........................................................................................10
2.3.2. Version II TX Topology.........................................................................................11
2.3.3. Version III TX Topology .......................................................................................11
2.3.4. Upconversion Mixer...............................................................................................12
2.3.5. Preamplifier............................................................................................................13
2.4. Summary........................................................................................................................14
Chapter 3. Phase–locked Loop 15
3.1. Introduction ...................................................................................................................15
3.2. PLL Theory ...................................................................................................................16
3.2.1. Type I PLL .............................................................................................................16
3.2.1.1. Type I PLL Components.................................................................................16
3.2.1.2. Type I PLL Operating Principle .....................................................................18
3.2.2. Type II PLL............................................................................................................20
3.2.2.1. Type II PLL Components ...............................................................................20
3.2.2.2. Type II PLL Linear Model..............................................................................23
3.2.2.3. Type II PLL Stability Analysis.......................................................................26
3.2.3. PLL Phase Noise Properties...................................................................................28
3.2.3.1. Phase Noise of the Input Signal......................................................................28
3.2.3.2. VCO Phase Noise ...........................................................................................29
v Glišić, Design of Fully Integrated 60 GHz OFDM Transmitter in SiGe BiCMOS Technology

3.2.3.3. LPF Noise....................................................................................................... 30
3.3. RMS Phase Error Optimization .................................................................................... 31
3.4. Calculation of PLL Parameters..................................................................................... 32
3.4.1. Parameter Calculation Recipe for a Third Order PLL........................................... 33
3.4.2. Parameter Calculation Recipe for a Fourth Order PLL......................................... 34
3.4.3. A New Parameter Calculation Recipe for a Fourth Order PLL............................. 37
3.5. Comparison of Different PLL Topologies.................................................................... 43
3.5.1. Dual Loop PLL...................................................................................................... 43
3.5.2. Comparison of a Third, Forth Order and Dual Loop PLLs ................................... 44
3.6. PLL for AFE version I .................................................................................................. 46
3.7. PLL for AFE version II................................................................................................. 49
3.8. Summary ....................................................................................................................... 50
Chapter 4. Image–rejection Filter 51
4.1. Introduction................................................................................................................... 51
4.2. Filter Design Theory ..................................................................................................... 51
4.2.1. Two–Port Network Characterization..................................................................... 52
4.2.2. Filter Parameters.................................................................................................... 53
4.2.3. Typical Filter Response Approximations .............................................................. 54
4.2.4. Lowpass Prototype Filters ..................................................................................... 55
4.2.5. Element and Frequency Transformation ............................................................... 58
4.2.6. Immittance Inverters.............................................................................................. 59
4.2.7. Filters with Immittance Inverters........................................................................... 62
4.2.8. Richards’ Transformation...................................................................................... 64
4.2.9. End–Coupled Microstrip Filters ............................................................................ 66
4.2.10. Parallel–Coupled Microstrip Filters................................................................... 68
4.2.11. Hairpin Microstrip Filters .................................................................................. 70
4.2.12. Selective Microstrip Filters with Transmission Zeros ....................................... 73
4.3. Filter Losses ............................................................

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