Design optimization of AlInAs GaInAs HEMTs for high-frequency applications

López Mateos, Javier, Sánchez González, Tomás, Collantes Pardo, Daniel, Bollaert, Sylvain, Parenty, Thierry, Cappy, Alain

Description

Colecciones : GIDS. Artículos del Grupo de Investigación en Dispositivos Semiconductores
Fecha de publicación : 2004
Por medio de simulaciones Monte Carlo se ha estudiado el efecto que tienen sobre las características dinamicas de HEMTs de InGaAs con 50nm de longitud de puerta dos parámetros importantes en la fabricación de los transistores: su anchura y el nivel de dopaje de la capa delta. El cálculo de los valores de las frecuencias de corte ft y fmax nos ha permitido concluir que el dopaje delta debe ser lo menor posible para mejorar las prestaciones en alta frecuencia, con el problema que tanbien hace disminuir la potencia entregada. También la anchura de los transistores debe ser la menor posible para obtener valores óptimos de ft y fmax, siempre teneiendo en cuenta que al reducirla el efecto de las capacidades puede hacerse importante.By using a Monte Carlo simulator, the static and dynamic characteristics of 50-nm-gate AlInAs GaInAs -dopedhigh-electron mobility transistors (HEMTs) are investigated. The Monte Carlo model includes some important effects that areindispensable when trying to reproduce the real behavior of the devices, such as degeneracy, presence of surface charges, T-shape of the gate, presence of dielectrics, and contact resistances. Among the large quantity of design parameters that enter the fabricationof the devices, we have studied the influence on their performanceof two important factors: the doping level of the -doped layer, and the width of the devices. We have confirmed that the value of the -doping must be increased to avoid the reduction of the drain current due to the depletion of the channel by the surface potential.However, a higher -doping has the drawback that the frequency performance of the HEMTs is deteriorated, and its value must be carefully chosen depending on the system requirements in termsof delivered power and frequency of operation. The reduction of the device width has been also checked to improve the cutoff frequencies of the HEMTs, with a lower limit imposed by the degradation provoked by the offset extrinsic capacitances.

Sujets

• Sciences et techniques

Informations

• Publié par: Salamanca
• Nombre de lectures: 19
• Licence : En savoir +
  Paternité, pas d'utilisation commerciale, partage des conditions initiales à l'identique
• Langue: Español

Extrait

nP-based
difficulties when dealing with ultrashort gate HEMTs. The
HEMTs using the AlInAs–GaInAs material system, it is pos-
small size of these devices leads to the appearance of very high
sible to reach of more than 560 GHz [4] and up to
electric fields inside them, and consequently hot carrier effects
600 GHz [5], improving those of usual GaAs-based pseudomor-
[6], that can only be adequately reproduced by using the MC
phic HEMTs.
technique [7]. Moreover, in the case of heterojunction devices,
the electron confinement can also give rise to quantum effects
Manuscript received September 4, 2003; revised December 11, 2003. This such as degeneracy, energy quantization in the channel, and
work was supported in part by the Ministerio de Ciencia y Tecnología (and
tunneling from the channel to the gate. If a correct descriptionFEDER) under Project TIC2001-1754, and the Consejería de Educación y Cul-
tura de la Junta de Castilla y León under Project SA057/02. The review of this were required it would be necessary to self-consistently solve
paper was arranged by Editor M. Anwar. Poisson and Schrödinger equations, which, for the moment,
J. Mateos Lopez, T. González, and D. Pardo are with the Departamento de
is an unaffordable task in terms of computation time for aFísica Aplicada, Universidad de Salamanca, 37008 Salamanca, Spain (e-mail:
[e-mail]). dynamic simulation. In order to overcome these difficulties,
S. Bollaert, T. Parenty, and A.Cappy are with the Institut d’Electronique, et we will make use of a semiclassical MC model that locally
de Microélectronique et de Nanotechnologies, Département Hyperfréquences et
takes into account the effect of the degeneracy by usingSemiconducteurs, University of Lille, Villeneuve D’Ascq Cédex, 59652 France.
Digital Object Identifier 10.1109/TED.2004.823799 the rejection technique [8]. The rest of quantum effects are
0018-9383/04$20.00 © 2004 IEEE
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522 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 51, NO. 4, APRIL 2004
Fig. 1. Equivalent circuit of the HEMTs (the position of the capacitance
is shown but it is not considered in the calculations). The shaded area represents
the intrinsic elements obtained through the MC simulation, and the outer dotted
Fig. 2. Output characteristics of the real 70-nm-gate and the simulated
box encloses the “intrinsic” equivalent circuit from the point of view of the
50-nm-gate HEMT with =6 cm .
experimental measurements: =1 pH, =25 pH, =1 fF,
fF mm , mm W= ( is the number
of gate fingers, which in this work will be always 2), =(0 mm ,
of the parasitic elements on the device width (that corre-and =(0 mm .
sponds to the nonsimulated dimension in the 2-D MC model).
While the source, gate and drain inductances, ( , , and ,
not considered in order to keep the calculation time at an
respectively) and the gate pad capacitance are almost in-
acceptable level. More details about the two-dimensional (2-D)
dependent of , the gate resistance and drain pad capac-
MC model can be found elsewhere [9]–[14]. The validity
itance are proportional to , and the source and drain
of this approach has been checked in previous works by
resistances ( and , respectively, representing the nonsim-
means of the comparison with experimental results of static
ulated part of the contact resistances) to .
characteristics, small-signal behavior and noise performance
of an InP lattice-matched 100-nm-gate HEMT [9], [10].
III. COMPARISON WITH EXPERIMENTAL RESULTSUsing this MC simulator as analyzing tool, we will present
a microscopic investigation of a lattice matched 50-nm-gate The previously explained MC model has been used to
-doped – HEMTs that will improve the fabrication process of sub-100-nm-gate InP based
allow predicting some design rules for the fabrication of these pseudomorphic HEMTs [19]. In the optimized layer structure
devices. used for the fabrication, the gate-to-channel distance has been
Impact ionization mechanisms are not considered in this ver- fixed at 11.5 nm and the doping at 6 cm . The
sion of the simulator since in this work we are restricted to low gate-to-channel distance cannot be further reduced in order to
values of (0.5 V), where kink effect due to the appearance of prevent for gate-tunneling current. To improve the Schottky
impact ionization is not present in lattice-matched HEMTs (or is contact characteristics and the confinement of electrons in the
extremely weak). On the other hand, it has been experimentally channel, the aluminum content in the AlInAs layers has been
found [15], and we have confirmed in our simulations [16], that fixed to a value of 0.65. Moreover, in the channel we have
kink effect is a slow process, only affecting the low-frequency used an indium content of 0.65 to improve the carrier transport
behavior (up to some MHz) of the devices. properties. Even if the projected gate length was 50 nm, the
The intrinsic small-signal equivalent circuit of the HEMTs difficulties of the technological process (whose details are
has been calculated taking as a basis their -parameters, ob- given in [19]) result, in the most favorable case, in a slightly
tained by using the classical MC technique [17]. The equivalent longer gate of 70 nm. We will therefore compare the MC
circuit must take into account the “extrinsic” (from the point model with measurements of the best device that we have been
of view of MC simulation) geometric capacitances , , able to fabricate. Even if it is not exactly the same device, the
and , which are not included in the MC simulation, but from comparison of the simulation with these experimental results
the point of view of the measurements are within the intrinsic can be very useful to identify effects not included in the model,
section of the circuit [10]. The complete equivalent circuit is like the influence of the gate leakage current on the high
shown in Fig. 1, where the shaded area represents the intrinsic frequency behavior of the HEMTs.
elements that are obtained from the MC simulation, while the We will first compare the MC current–voltage ( – )
dotted box encloses the “intrinsic” equivalent circuit from the characteristics with those measured in the real device with
point of view of experimental measurements. For the 50-nm m. As observed in Fig. 2, even if the real and
HEMT we have taken for , , and the same values the simulated HEMTs are not exactly the same, the results
as for the 100-nm one ( fF mm, fF mm of the simulation for the – curves are quite similar to the
and ) since these geometrical capacitances are prac- experimental measurements. Even if this similarity could be
tically independent of the gate length. The -parameter mea- considered to be surprising, it can be explained in terms of the
surements were made in the 0.5–50 GHz frequency range and opposite influence of the two main differences between the
the small-signal equivalent circuit extracted using the cold FET real and simulated devices, namely, the gate length and the In
method [18]. It is important to take into account the dependence content of the channel. The longer gate of the fabricated 70-nm
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=R(22010=n)R25WR=W=:(250
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MATEOS LOPEZ et al.: DESIGN OPTIMIZATION OF AlInAs–GaInASs HEMTS FOR HIGH-FREQUENCY APPLICATIONS 523
Fig. 3. Values of and measured in the real 70-nm-gate HEMT and
simulated in the 50-nm-gate HEMT with =6 cm for the bias
point where the maximum is obtained =0 V . Also the value of
calculated including gate shunt resistance =60 K is plotted.
pseudomorphic HEMT dete-
riorates the device performance (with respect to the simulated
Fig. 4. Geometries of the simulated (a) 100-nm-gate and (b) 50-nm-gate
50-nm lattice matched HEMT), which is compensated by the HEMTs.
better electron confinement and the improved carrier mobility
in the channel.
the channel, thus degrading the device performance. To min-In Fig. 3, the experimental values of and are com-
imize this effect, the lower limit for this distance is approxi-pared with those obtained from the MC simulation. The discrep-
mately 100 . Tunneling is not considered in the simulation and
ancy in the values of at low frequency GHz comes
it can only be detected by means of the experimental measure-
from the absence of gate leakage current within the MC model.
ment of the gate leakage current. Moreover, in the scaling down
This effect can be modeled by including in the equivalent cir-
process, the value of the charge of the -doping plane is a key
cuit of the HEMTs (Fig. 1) a gate-drain resistance in par-
parameter, since it must be sufficiently low to avoid conduc-
allel with . In Fig. 3, the values of calculated using
tion through this layer, but high enough to fill up the channel.
K (in good agreement with the measured values)
The -doped layer must also be able to screen the influence of
are also plotted, showing clearly that the presence of this shunt
the surface charge placed on the recess, thus avoiding the de-
resistance introduces a new pole in at low frequency, while
pletion